发明名称 |
Precise exit logic for removal of security overlay of instruction space |
摘要 |
A circuit generally comprising a first memory, a processor and a logic block is disclosed. The first memory may store (i) a write instruction to store a non-highest security value of at least three security values in a register and (ii) a jump instruction to a second memory. The processor may have a pipeline and may be configured to (i) bootstrap to the first memory while the register stores a highest security value of the security values and (ii) execute the jump instruction following the write instruction. The logic block may be configured to (i) detect the write instruction in an execution stage of the pipeline and (ii) store the non-highest security value in the register in response to detecting the write instruction in a write back stage of the pipeline.
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申请公布号 |
US7254720(B1) |
申请公布日期 |
2007.08.07 |
申请号 |
US20020326440 |
申请日期 |
2002.12.20 |
申请人 |
LSI CORPORATION |
发明人 |
GILES CHRISTOPHER M.;BEWICK SIMON;WILLIAMS KALVIN E. |
分类号 |
H04N7/167;G06F12/14;G06F17/30 |
主分类号 |
H04N7/167 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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