发明名称 Non-volatile semiconductor memory device and method for reading the same
摘要 In a reference cell 202 , first and second cells 50 and 52 having the same structure as that of a memory cell are provided. A memory cell current IREF 1 of the first cell 50 is set to be a minimum value of a memory cell current after an erase operation. A memory cell current IREF 2 of the second cell 52 is set to be a maximum value of a memory cell current after a write operation. The read circuit 206 compares a memory cell current Icell with a current (IREF 1 +IREF 2 )/2 and outputs a comparison result. A current source for use in erase verification and write verification may be used in place of the first and second cells 50 and 52.
申请公布号 US7254063(B2) 申请公布日期 2007.08.07
申请号 US20050215049 申请日期 2005.08.31
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 MORI TOSHIKI
分类号 G11C11/34 主分类号 G11C11/34
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