| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a level conversion circuit, the power consumption of which can be reduced and which is immune to dispersion in transistor characteristics and to provide a display apparatus using the level conversion circuit. <P>SOLUTION: The level conversion circuit 20 for converting a first level of a clock signal ck into a second level of a clock signal out uses a complementary circuit 21 comprising an Nch drive MOS transistor n21 and a Pch drive MOS transistor p21 for a basic circuit, and a switching MOS transistor n23, p23 are connected between the gate and the drain of the drive MOS transistor n21, p21. Each threshold value of the drive MOS transistor n23, p23 is cancelled by the action of the switching MOS transistor n23, p23 to set an operating point to a level at which no current flows to the drive MOS transistors n21, p21 thereby preventing a leak current (through-current) from flowing to the complementary circuit 21. <P>COPYRIGHT: (C)2007,JPO&INPIT |
