发明名称 Baustein mit Schaltungen zur Durchfuehrung logischer Verknuepfungen
摘要 1,262,143. Semi-conductor logic circuits. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 26 Feb., 1969 [29 Feb., 1968], No. 10272/69. Heading H3T. [Also in Division G4] A logic circuit such as a binary to decimal converter has an input stage A 0 and an output stage T 4 connected in series across the supply voltage, and means such as diodes D 2 , D 3 is provided to maintain constant the voltage of the junction U R between the stages irrespective of the logic state of the circuit. Each of four input stages A 0 , B 0 , C 0 , Do, having three transistors T 1 , T 2 , T 3 , is arranged to receive an input A 1 , B 1 etc. and to give direct and inverted outputs A, A, B, B etc. Each of the ten output circuits connected to terminals 0 to 9 is similar to X5 and has an OR gate T 6 to T 9 receiving selected ones of the outputs A to D of the input stages; and has the OR gate output, at the function of R 2 R 3 , connected to the inverting transistor T 4 which drives a further inverting transistor T 5 . The latter derives its supply directly from the voltage supply Z through a resistor R 5 . A low voltage "0" appears at an output such as "5" only when all the inputs to T 6 , T 7 , T 8 , T 9 are "0"; that is when A, B, C and D are all "0" corresponding to an input A 1 B 1 C 1 D 1 signal of 1010.
申请公布号 DE1537986(A1) 申请公布日期 1970.03.12
申请号 DE19681537986 申请日期 1968.02.29
申请人 PHILIPS PATENTVERWALTUNG GMBH 发明人 HANS HOFFMANN,DR.;BERTRAM,UWE;HANS-WILHELM NEUHAUS,DIPL.-ING.;WITTORF,LUDWIG
分类号 H03K19/08;H03K19/082;H03M7/00;H03M7/08 主分类号 H03K19/08
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