发明名称 Method for pipelining analog-to-digital conversion and a pipelining analog-to-digital converter with successive approximation
摘要 A method for pipelining an analog-to-digital conversion of an analog input signal into an N-bit digital output signal is disclosed where a multiplexer is used for the selection of pre-processed digital approximation values from a plurality of adders and subtractors. The selection is set after the decoding of the selected digital approximation values. Thus, considerable more time of the total iteration cycle is available for the pre-amplifier to settle at very high operation frequencies.
申请公布号 US7250896(B1) 申请公布日期 2007.07.31
申请号 US20060445429 申请日期 2006.06.01
申请人 INFINEON TECHNOLOGIES AG 发明人 HESENER MARC
分类号 H03M1/34 主分类号 H03M1/34
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