Fully-buffered dual in-line memory module with fault correction

摘要

A memory module comprises first memory that stores data in memory blocks; second memory that temporarily stores data from at least one of the memory blocks and third memory for storing a relationship between addresses of the at least one of the memory blocks in the first memory and corresponding addresses of the data from the at least one of the memory blocks in the second memory. Storage capacities of the second and third memories are less than a storage capacity of the first memory. A control module selectively transfers data in the at least one of the memory blocks in the first memory to the second memory and stores and retrieves data from the second memory for the at least one of the memory blocks based on the relationship during the testing.