PROCESS FOR INTEGRATING PLANAR AND NON-PLANAR CMOS TRANSISTORS ON A BULK SUBSTRATE AND ARTICLE MADE THEREBY
摘要
<p>A process capable of integrating both planar (10) and non-planar (20, 30) transistors onto a bulk semiconductor substrate, wherein the channel of all transistors is definable over a continuous range of widths.</p>
申请公布号
WO2007038575(A3)
申请公布日期
2007.07.19
申请号
WO2006US37634
申请日期
2006.09.26
申请人
INTEL CORPORATION;KAVALIEROS, JACK;BRASK, JUSTIN;DOYLE, BRIAN;SHAH, UDAY;DATTA, SUMAN;DOCZY, MARK;METZ, MATTHEW;CHAU, ROBERT
发明人
KAVALIEROS, JACK;BRASK, JUSTIN;DOYLE, BRIAN;SHAH, UDAY;DATTA, SUMAN;DOCZY, MARK;METZ, MATTHEW;CHAU, ROBERT