发明名称 SEQUENTIAL ACCESS MEMORY
摘要 Semiconductor memory devices 10 are each furnished with a memory array 100 having an EEPROM array 101 and a mask ROM array 102 . Identifying information for identifying each semiconductor memory device 10 is stored at the beginning three addresses of the EEPROM array 101 . 8-bit data relating to ink level is stored at the ninth address to sixteenth address of the EEPROM array 101 . The seventeenth address to the twenty-fourth address of the EEPROM array 101 is provided with a usage history information storage area for storing 8-bit usage history information that is rewriteable under certain conditions.
申请公布号 US2007165482(A1) 申请公布日期 2007.07.19
申请号 US20070622160 申请日期 2007.01.11
申请人 ASAUCHI NOBORU 发明人 ASAUCHI NOBORU
分类号 G11C8/00 主分类号 G11C8/00
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