发明名称 DUAL DAMASCENE PROCESS USING POLYMER
摘要 A dual-damascene process using polymer is provided to protect a via hole and a lower metallization by forming a byproduct which is formed in an etching process chamber when the via hole is formed, in the via hole. A capping layer and an interlayer dielectric(130) are formed on a semiconductor substrate, and a first photoresist pattern(162) is formed on the interlayer dielectric. The interlayer dielectric is etched to form a via hole(140) through dry etching, and a byproduct(150) which is obtained at the etching step is formed in the via hole. The first photoresist pattern is removed by an ashing process, and then a second photoresist pattern is formed on the interlayer dielectric. The interlayer dielectric is etched by drying etching to form a trench, and then the second photoresist pattern and the byproduct are removed by the ashing process.
申请公布号 KR100741924(B1) 申请公布日期 2007.07.16
申请号 KR20060046965 申请日期 2006.05.25
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 HWANG, SANG IL
分类号 H01L21/28 主分类号 H01L21/28
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