发明名称 Scan flip-flop circuit and semiconductor integrated circuit device
摘要 Disclosed is a scan flip-flop that includes a latch section, a hold section, a first output node and a second output node. The latch section holds data. The hold section captures an inner state, responsive to a control signal, to hold an output state. The first output node outputs a first output signal based on the output state. The second output node outputs a second output signal based on the inner state.
申请公布号 US2007162802(A1) 申请公布日期 2007.07.12
申请号 US20070650468 申请日期 2007.01.08
申请人 NEC ELECTRONICS CORPORATION 发明人 MIWA SHUNJIRO
分类号 G01R31/3177 主分类号 G01R31/3177
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