| 摘要 |
An apparatus to recognize memory devices, the apparatus including a plurality of slaves having the same fixed address, a master controller to supply power to the slaves and to output a signal to select a predetermined slave, and a power control unit to control power supplied to the slaves in response to the selection signal. The apparatus is capable of decreasing production cost by using a plurality of slaves which have the same fixed address, reducing the complexity in the manufacturing process, and providing an easier management of replaceable parts in the apparatus using the replaceable parts which include memory devices. In addition, the same fixed address can be used without changing an existing I2C interface bus, which is a standard interface.
|
