Power down detection circuit

摘要

A power down reset circuit for asserting a signal when a first V_DD voltage falls below a voltage threshold. The circuit has at least one diode coupled to the first V_DD voltage. The at least one diode is configured to produce a second voltage. At least one capacitor is coupled to the at least one diode to maintain the second voltage. A voltage detector asserts a signal when the first V_DD voltage drops below a threshold level. The voltage detector is powered by the second voltage and is coupled to the at least one diode.