| 摘要 |
PROBLEM TO BE SOLVED: To reduce power supply voltage, while reducing the number of vertically-stacked transistors. SOLUTION: A gain variable circuit is constituted of a load resistor 21 connected between a power supply terminal VD and an output terminal OUTB; a load resistor 22 connected between the power supply terminal VD and an output terminal OUT; a first differential circuit, which is connected between the output terminals OUTB, OUT and a first node comprising FETs 31, 32 for changing each of the output voltage gains of the output terminals OUTB, OUT corresponding to a difference between complementary first/second gain variable voltages, a second differential circuit which is connected between the output terminals OUTB, OUT and a second node, and comprising FETs 33, 34 for changing each output voltage gain of the output terminals OUTB, OUT corresponding to a difference between the first/second gain variable voltages; and a grounded source circuit that amplifies which is connected between the first/second nodes and a ground GND comprising FETs 35, 36 for amplifying each of the output voltages of the output terminals OUTB, OUT corresponding to a difference between complementary first/second input voltages. COPYRIGHT: (C)2007,JPO&INPIT
|
