| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor storage device increased in write speed. <P>SOLUTION: A memory cell array 1 is connected to word lines WL and a bit line BL and constituted so that a plurality of serially connected memory cells are arranged in matrix. The word line is selected by a selection transistor HVNTr. A control circuit controls potentials of the word line and bit line in accordance with input data and writes the data with respect to the memory cell to control the reading and erasing operation. The selection transistor is formed on a substrate, and a first negative voltage is supplied to the substrate in the read operation, and a first voltage (first voltage≥first negative voltage) is supplied to the selective word line, and a second voltage is supplied to a non-selective word line. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
