发明名称 TESTBENCH SYSTEM OF DMA CONTROLLER
摘要 A testbench system for a DMA controller is provided to verify a function of the DMA controller in a system level by freely generating a verification vector for all probable cases with a controller module between a peripheral module and the DMA controller. A testbench(210) provides various verification vector signals for testing the function of the DMA controller(250). The peripheral module(230) is controlled by an interface module(260), receives the verification vector signal from the interface module, and outputs the first DMA request corresponding to the verification vector signal. The controller module(240) is controlled by the interface module, holds the first DMA request output from the peripheral module, and combines a sequence of the held first DMA requests or outputs the held first DMA requests as a group. The DMA controller is controlled by the interface module, transfers an acknowledge signal for the second DMA request to the peripheral module by receiving the second DMA request from the controller module, and transfers a state signal indicating a current processing state to the controller module.
申请公布号 KR20070069343(A) 申请公布日期 2007.07.03
申请号 KR20050131338 申请日期 2005.12.28
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 CHUNG, HYE RIM
分类号 G06F11/26 主分类号 G06F11/26
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