ON-CHIP INTERCONNECT-STACK COOLING USING SACRIFICIAL INTERCONNECT SEGMENTS
摘要
The present invention relates to an integrated-circuit device and to a method for fabricating an integrated-circuit device with an integrated fiuidic-cooling channel. The method comprises forming recesses in a dielectric layer sequence at desired lateral positions of electrical interconnect segments and at desired lateral positions of fiuidic-cooling channel segments. A metal filling is deposited in the recesses of the dielectric layer sequence so as to form the electrical interconnect segments and to form a sacrificial filling in the fiuidic-cooling channel segments. Afterwards, the sacrificial metal filling is selectively removed from the fiuidic- cooling channel segments.
申请公布号
WO2007071674(A2)
申请公布日期
2007.06.28
申请号
WO2006EP69910
申请日期
2006.12.19
申请人
KONINKLIJKE PHILIPS ELECTRONICS N.V.;ST MICROELECTRONICS CROLLES 2 SAS;GOSSET, LAURENT;ARNAL, VINCENT