发明名称 |
AMPLIFICATION-TYPE CMOS IMAGE SENSOR |
摘要 |
Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.
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申请公布号 |
US2007139544(A1) |
申请公布日期 |
2007.06.21 |
申请号 |
US20060612115 |
申请日期 |
2006.12.18 |
申请人 |
EGAWA YOSHITAKA;OHSAWA SHINJI |
发明人 |
EGAWA YOSHITAKA;OHSAWA SHINJI |
分类号 |
H01L27/146;H04N5/335;H04N5/357;H04N5/369;H04N5/374;H04N5/376;H04N5/378 |
主分类号 |
H01L27/146 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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