| 摘要 |
A method of manufacturing a full depletion SOI-MOS transistor including a substrate, a buried oxide layer, a thin silicon layer, an isolation layer, a gate insulation layer, a gate electrode and a polysilicon layer. The buried oxide layer is formed on a main surface of the substrate. The thin silicon layer is formed on the buried oxide layer and includes a channel region and a source/drain region. The isolation layer is formed on the buried oxide layer and surrounds the thin silicon layer. A gate insulation layer and gate electrode are formed on the channel region of the thin silicon layer. The polysilicon layer is deposited on the source/drain region of the thin silicon layer.
|
