| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory device provided with a floating body transistor capacitor-less memory cell and its operating method. SOLUTION: The semiconductor memory device includes a memory cell array which includes a plurality of unit memory cells, where each of the unit memory cells comprises complementary first and second floating body transistor capacitor-less memory cells. A logical value used in and read from each unit memory cell is defined by a difference in threshold voltage states of the first and second floating body transistor capacitor-less memory cells. COPYRIGHT: (C)2007,JPO&INPIT
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