发明名称 Nickel salicide process with reduced dopant deactivation
摘要 Provided are exemplary methods for forming a semiconductor devices incorporating silicide layers formed at temperatures below about 700° C., such as nickel silicides, that are formed after completion of a silicide blocking layer (SBL). The formation of the SBL tends to deactivate dopant species in the gate, lightly-doped drain and/or source/drain regions. The exemplary methods include a post-SBL activation anneal either in place of or in addition to the traditional post-implant activation anneal. The use of the post-SBL anneal produces CMOS transistors having properties that reflect reactivation of sufficient dopant to overcome the SBL process effects, while allowing the use of lower temperature silicides, including nickel silicides and, in particular, nickel silicides incorporating a minor portion of an alloying metal, such as tantalum, the exhibits reduced agglomeration and improved temperature stability.
申请公布号 US7232756(B2) 申请公布日期 2007.06.19
申请号 US20040812003 申请日期 2004.03.30
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KU JA-HUM;ROH KWAN-JONG;SUN MIN-CHUL;KIM MIN-JOO;JUNG SUG-WOO;YOUN SUN-PIL
分类号 H01L21/44;H01L21/285;H01L21/336;H01L29/78 主分类号 H01L21/44
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