发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT, AND METHOD FOR REDUCING LEAKAGE CURRENT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which has a circuit configuration effective for reducing leakage current consumed by its internal circuit during standby, and to provide a method for reducing a leakage current. <P>SOLUTION: A semiconductor integrated circuit device includes at least an inner circuit 100 including first and second NMOS transistors mn101 and mn102; and a leakage current reducing circuit 200 which is electrically connected with a source of the first and second NMOS transistors mn101 and mn102, applies a ground voltage GND as a first source bias voltage to the first and second NMOS transistors mn101 and mn102 when the inner circuit 100 is in the active state, and applies a second source bias voltage different from the ground voltage GND and for inversely biasing between the source of the first and second NMOS transistors mn101 and mn102 and a substrate to the first and second NMOS transistors mn101 and mn102, when the internal circuit 100 is in the standby state, according to control signals Standby indicating the active state or the standby state of the internal circuit 100. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2007150761(A) 申请公布日期 2007.06.14
申请号 JP20050342893 申请日期 2005.11.28
申请人 OKI ELECTRIC IND CO LTD 发明人 HIROTA MAKOTO;KIKUCHI HIDEKAZU;MIYAMOTO SANPEI
分类号 H03K19/00;H01L21/822;H01L27/04;H03K3/356 主分类号 H03K19/00
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