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发明名称
Verfahren und Vorrichtung zur Reduzierung falscher Fehlererkennung in einem Mikroprozessor
摘要
申请公布号
DE112005001338(T5)
申请公布日期
2007.06.14
申请号
DE200511001338
申请日期
2005.05.20
申请人
INTEL CORPORATION
发明人
MUKHERJEE, SHUBHENDU;EMER, JOEL;REINHARDT, STEVEN;WEAVER, CHRISTOPHER;SMITH, MICHAEL
分类号
G06F9/38;G06F11/10;G06F11/14
主分类号
G06F9/38
代理机构
代理人
主权项
地址
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