发明名称 CIRCUIT BOARD ASSEMBLY WITH REDUCED CAPACITIVE COUPLING
摘要 In one embodiment, a substrate assembly includes a flat substrate having oppositely disposed planar surfaces and a conductor. The conductor is formed on at least one of the planar surfaces and defines a conductor plane. The structure further includes an oversized-in-diameter anti-pad formed through the substrate layer and the conductor layer. The anti-pad further includes a dielectric spacer formed substantially coplanar with the conductor plane.
申请公布号 EP1795057(A1) 申请公布日期 2007.06.13
申请号 EP20050777457 申请日期 2005.07.27
申请人 TERADYNE, INC. 发明人 YOON, YEONG-JOO;AGUIRRE, FERNANDO;TENEKETGES, NICHOLAS J.
分类号 H05K1/02 主分类号 H05K1/02
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