TRENCH TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME

摘要

A trench transistor and its manufacturing method are provided to minimize parasitic capacitance and to improve the operation speed of device by increasing a thickness of an oxide layer at a bottom section of a trench. A trench(24) for defining a channel is formed on a substrate(21). A gate oxide layer(25) is formed on a surface of the trench. A buffer spacer is connected to both sidewalls of the trench and exposes a bottom section of the trench. The buffer spacer is formed by laminating a first buffer spacer and a second buffer spacer. An oxide layer(27) is formed under the bottom section of the trench deviating from the channel. The second buffer spacer is removed. A gate electrode(28) is formed to gap-fill the trench. An ion implantation process is performed on the whole surface of the substrate to form an N-type diffusion layer(29). An interlayer dielectric(30) is formed on the substrate. The interlayer dielectric is etched by using a contact mask as an etch mask to open a contact region at the same time the N-type diffusion layer under the contact region is etched to from a recess(32). An ion implantation process is performed on the substrate at a bottom of the recess to form a P-type diffusion layer(33). A metal wire(34) is connected to the P-type diffusion layer.