发明名称 MICROPROCESSOR MEMORY MANAGEMENT
摘要 A memory for an electronic brake control system is divided into portions that are classified as critical and non-critical. Each portion is periodically tested for faults. Upon detection of a fault, the memory is reconfigured with any operations of the brake system associated with a critical memory portion permanently disabled and any operations of the brake system associated with a non-critical memory portion temporarily disabled.
申请公布号 WO2007064781(A2) 申请公布日期 2007.06.07
申请号 WO2006US45820 申请日期 2006.11.30
申请人 KELSEY-HAYES COMPANY;HALLER, MARK 发明人 HALLER, MARK
分类号 G06F19/00 主分类号 G06F19/00
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