发明名称 WIRING BOARD AND SEMICONDUCTOR DEVICE USING IT
摘要 PROBLEM TO BE SOLVED: To provide a wiring board relaxing a stress concentration to an inner lead in the case of mounting a semiconductor chip when electrode pads for the semiconductor chip are arrayed at coarse pitches and inhibiting the disconnection of the inner lead. SOLUTION: The wiring board has a flexible insulating base material 1, a plurality of conductor wirings arrayed on the insulating base material and forming the inner leads 4 by ends arranged in a region with the loaded semiconductor chip 2, and bump electrodes 5 formed to the inner leads in each conductor wiring. The wiring board has dummy inner leads 6 aligned and arranged to the inner leads in shapes and at pitches corresponding to the inner leads, and having formed dummy bump electrodes 7 corresponding to the bump electrodes. The wiring board further has one trunk conductor wiring 8 formed corresponding to the pairs of a plurality of one or adjacent dummy inner leads, and branching wirings 9 branched from the trunk conductor wiring and connected to each dummy inner lead of the corresponding pair. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007142103(A) 申请公布日期 2007.06.07
申请号 JP20050333004 申请日期 2005.11.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TORII MICHIHARU;NAGAO KOICHI;SHIMOISHIZAKA NOZOMI
分类号 H01L21/60 主分类号 H01L21/60
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