发明名称
摘要 A computer system includes a home node and one or more remote nodes coupled by a node interconnect. The home node includes a local interconnect, a node controller coupled between the local interconnect and the node interconnect, a home system memory, and a memory controller coupled to the local interconnect and the home system memory. In response to receipt of a data request from the remote node, the memory controller transmits requested data from the home system memory to the remote node and, in a separate transfer, conveys responsibility for global coherency management for the requested data from the home node to the remote node. By decoupling responsibility for global coherency management from delivery of the requested data in this manner, the memory controller queue allocated to the data request can be deallocated earlier, thus improving performance.
申请公布号 JP3924204(B2) 申请公布日期 2007.06.06
申请号 JP20020164530 申请日期 2002.06.05
申请人 发明人
分类号 G06F12/08;G06F15/177 主分类号 G06F12/08
代理机构 代理人
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