发明名称 High-pressure processing chamber for a semiconductor wafer
摘要 A processing chamber having an improved sealing means is disclosed. The processing chamber comprises a lower element, an upper element, and a seal energizer. The seal energizer is configured to maintain the upper element against the lower element to maintain a processing volume. The seal energizer is further configured to generate a sealing pressure in a seal-energizing cavity that varies non-linearly with a processing pressure generated within the processing volume. In one embodiment, the seal energizer is configured to minimize a non-negative net force against one of the upper element and the lower element above a threshold value. The net force follows the equation P 2 *A 2 -P 1 *A 1 , where P 2 equals the sealing pressure, P 1 equals the processing pressure, A 2 equals a cross-sectional area of the seal-energizing cavity, and A 1 equals a cross-sectional area of the processing volume.
申请公布号 US7225820(B2) 申请公布日期 2007.06.05
申请号 US20030680783 申请日期 2003.10.06
申请人 TOKYO ELECTRON LIMITED 发明人 JONES WILLIAM DALE
分类号 B08B3/02;C23C16/00;H01L;H01L21/00;H01L21/306 主分类号 B08B3/02
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