发明名称 |
CLOCK ARCHITECTURE FOR A FREQUENCY-BASED TESTER |
摘要 |
A CLOCK SYSTEM IS DISCLOSED FOR DISTRIBUTING AND GENERATING A DIGITAL CLOCK SIGNAL FOR A PLURALITY OF ELECTRONIC ASSEMBLIES. THE CLOCK SYSTEM INCLUDES A REMOTE FIXED-FREQUENCY CLOCK FOR GENERATING A FIRST CLOCK SIGNAL OF A FREQUENCY AND A PLURALITY OF LOCAL CLOCK MODULES. THE LOCAL CLOCK MODULES ARE RESPECTIVELY DISPOSED ON THE PLURALITY OF ELECTRONIC ASSEMBLIES AND EACH INCLUDE SYNTHESIZER CIRCUITRL FOR CREATING A VARIABLE CLOCK SIGNAL OF A DIFFERENT FREQUENCY THAN THE FIRST FREQUENCY. FANOUT CIRCCUITRY IS COUPLED BETWEEN THE REMOTE FIXED FREQUENCY CLOCK AND THE PLURALITY OF LOCAL CLOCK MODULES TO DISTRIBUTE THE FIRST CLOCK SIGNAL.
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申请公布号 |
MY129833(A) |
申请公布日期 |
2007.05.31 |
申请号 |
MYPI20024177 |
申请日期 |
2002.11.08 |
申请人 |
TERADYNE, INC. |
发明人 |
REICHERT, PETER A.;GAGE, ROBERT B. |
分类号 |
H04L7/00;G01R31/319 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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