| 摘要 |
PROBLEM TO BE SOLVED: To verify whether or not a part which should not be replaced is changed and to avoid being determined that a latch circuit, etc., not relating to logic is inconsistency in a re-order process when verifying a logical equivalence property of a net list after re-ordering in logical designing of a semiconductor integrated circuit. SOLUTION: A method for designing a semiconductor integrated circuit disposes a cutoff point at a specific point on a connection point of a flip-flop circuit constituting a scan chain after re-ordering, and prevents performing inconsistency determination by rejecting the cutoff point from verification targets when verifying the logical equivalence property. Further, the method makes it possible to verify the fact of no change in the flip-flop circuit prohibited from being re-ordered by setting so as not to set up a specific point at a connecting point of a flip-flop circuit the part of which is prohibited from being replaced through the re-order process. COPYRIGHT: (C)2007,JPO&INPIT
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