| 摘要 |
PURPOSE:To decrease power consumption of a circuit by using plural depletion IGFETs and enhancement IGFETs in combination for an output circuit so as to allow high speed switching operation. CONSTITUTION:A constant voltage source Vcc is connected to the drain of the enhancement IGFET of an output circuit and an input signal A is connected to the gate. A drain of the depletion IGFETs 12, 14 is connected to the source of the FET11, the drain of the enhancement IGFETs 13, 15 to the gate of which an input signal I is inputted is connected to the source of the FETs 12, 14 and the source of the FETs 13, 15 is grounded. Moreover, the enhancement IGFETs 17-19 are connected in series between the power supply Vcc and ground, the signal I is inputted to the gate of the FET19 and the source of the FET11 is connected to the gate of the FET18. Then the drain of the enhancement IGFET16 to the gate of which an input signal A' is inputted is connected to a gate of the FET17. Then the power consumption of the circuit is decreased by the operation of high speed switching. |
