| 摘要 |
A high voltage level shifter having a cost effective design that saves chip architecture and power. The high voltage level-shifter includes a resistor connected between a first node and a first power supply rail. An inverter couples to receive an input signal to provide an inverted input signal. A first circuit portion couples to receive the inverted input signal and connects between the first power supply rail and a second power supply rail for converting a high voltage signal into a low voltage signal. The first circuit portion includes a first clamp circuit, wherein the first circuit portion is biased through the first clamp circuit and the first node. A second circuit portion couples to receive the input signal and connects between the first power supply rail and a second power supply rail for converting a low voltage signal into a high voltage signal. The second circuit portion includes a second clamp circuit, wherein the second circuit portion is biased through the second clamp circuit and the first node. The second circuit portion provides a first internal bias for the first circuit portion and the first circuit portion provides a second internal bias for the second circuit portion. This high voltage level-shifter provides level shifting a low voltage signal (<5V) to a high voltage signal (~40V), with no static power dissipation while still protecting all devices.
|
