| 摘要 |
A test circuit includes: a register circuit, into which data is written after data is cleared in compliance with a reset instruction, the register circuit holding the written data until a subsequent reset instruction is input; a TAP controller which receives a signal for selecting a test mode, and writes the data into the register circuit in accordance with the signal for selecting a test mode in synchronization with a first clock; a pattern generation circuit which generates a test pattern in accordance with the data held in the register circuit, and outputs data based on the test pattern to the circuit to be tested in synchronization with a second clock; and a data comparator which receives data output from the circuit to be tested in synchronization with the second clock, and makes an evaluation of performance in accordance with the test pattern and the data output from the circuit to be tested.
|
