发明名称 |
Differential buffer circuit with reduced output common mode variation |
摘要 |
A differential buffer circuit includes a current source, a current sink, and a switching circuit connected to the current source at a first node and connected to the current sink at a second node. The switching circuit is operative to selectively control a direction of current flowing through differential outputs of the buffer circuit in response to at least a first control signal. The buffer circuit further includes a common mode detection circuit and a common mode control circuit. The common mode detection circuit is operative to detect an output common mode voltage of the buffer circuit and to generate a second control signal representative of the output common mode voltage. The common mode control circuit includes a first terminal connected to the current source and a second terminal connected to the current sink. The common mode control circuit is operative to selectively control the output common mode voltage of the buffer circuit as a function of the second control signal.
|
申请公布号 |
US2007115030(A1) |
申请公布日期 |
2007.05.24 |
申请号 |
US20050285800 |
申请日期 |
2005.11.23 |
申请人 |
BHATTACHARYA DIPANKAR;KOTHANDARAMAN MAKESHWAR;KRIZ JOHN C;MORRIS BERNARD L |
发明人 |
BHATTACHARYA DIPANKAR;KOTHANDARAMAN MAKESHWAR;KRIZ JOHN C.;MORRIS BERNARD L. |
分类号 |
H03K19/094 |
主分类号 |
H03K19/094 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|