发明名称 Pulse-signaling circuits for networks on chip
摘要 A pulse circuit contains an input stage configured to receive input pulses on input nodes using push-pull elements, wherein a given push-pull element is configured to receive an input pulse on a given input node and to provide a corresponding internal signal. The pulse circuit further contains a feedback loop that includes a logic element coupled between outputs from the push-pull elements and reset nodes of the push-pull elements. This logic element is configured to provide one or more outputs from the pulse circuit and to reset the internal signals from the push-pull elements via the feedback loop.
申请公布号 US2007115040(A1) 申请公布日期 2007.05.24
申请号 US20060521031 申请日期 2006.09.14
申请人 EBERGEN JO C;FURBER STEPHEN B 发明人 EBERGEN JO C.;FURBER STEPHEN B.
分类号 G06F1/04 主分类号 G06F1/04
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