| 摘要 |
A multiplier for outputting the product of a multiplier factor A=A1-A2, where A1 and A2 are constants, and a multiplicand X, comprising a first partial-product generator receiving A1 and X and outputting partial products only with respect to the bits having the value of 1 in A1; a second partial-product generator receiving A2 and X and outputting partial products only with respect to the bits having the value of 1 in A2; a logic NOT means receiving the output signals from said second partial-product generator and outputting the logic NOT signals thereof; and a partial-product-sum means for receiving the output signals from said first partial-product generator, the output signals from said logic NOT means, and a correction signal, calculating the sum thereof, and outputting the sum as the product of the multiplier factor A and the multiplicand X. <IMAGE> |
