发明名称 METHOD AND DEVICE FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide designing method and device of a semiconductor integrated circuit with a small element arrangement area, which can automatically be arranged. SOLUTION: A standard cell is divided into a plurality of regions, and shared information having pin information at every region is added to a cell library. It is judged whether the standard can be arranged by sharing a part of the region with the standard cell which is adjacently arranged at the time of automatic arrangement, by comparing it with shared information. The standard cell is arranged by sharing a part of the region of the standard cell which is adjacently arranged at the time of arranging the standard cell by a judged result. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007115747(A) 申请公布日期 2007.05.10
申请号 JP20050302872 申请日期 2005.10.18
申请人 ELPIDA MEMORY INC 发明人 KITANO TOMOHIRO
分类号 H01L21/82;G06F17/50 主分类号 H01L21/82
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