发明名称 |
Semiconductor die with process variation compensated operating voltage |
摘要 |
A semiconductor die includes at least one process monitoring circuit for evaluating at least one process parameter of the semiconductor die. The at least one process monitoring circuit can include a first group of process monitoring circuits for monitoring NFET speed and a second group of process monitoring circuits for monitoring PFET speed. The process monitoring circuits can be distributed at the corners of the semiconductor die. The semiconductor die further includes a voltage control circuit configured to store optimum voltage information corresponding to the at least one process parameter. The voltage control circuit is further configured to selectively provide the optimum voltage information to a system power supply. The voltage control circuit includes a calculated optimum voltage register that stores the optimum voltage information corresponding to the at least one process parameter.
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申请公布号 |
US7215590(B1) |
申请公布日期 |
2007.05.08 |
申请号 |
US20050187431 |
申请日期 |
2005.07.21 |
申请人 |
MINDSPEED TECHNOLOGIES, INC. |
发明人 |
BORDEN CRAIG E.;DING CHIH-SHUN;MAJORS STEVE;MATLOUBIAN MISHEL |
分类号 |
G11C5/14 |
主分类号 |
G11C5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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