| 摘要 |
PROBLEM TO BE SOLVED: To obtain a timing analysis system for an integrated circuit which performs statistical timing analysis at high speed without deteriorating accuracy in the timing analysis for an integrated circuit. SOLUTION: The timing analysis system is provided with a first storage section 11A for storing a layout of an integrated circuit having a plurality of transistors, and a processing section 13 for processing the timing analysis. The processing section 13 includes a layout division section 13A for dividing the layout stored in the first storage section 11A into a plurality of sub-layouts, a timing analysis section 13B for statistically analyzing timings of the each sub-layout, and a data gathering section 13C for gathering the timings of the each sub-layout to decide a timing of the integrated circuit. COPYRIGHT: (C)2007,JPO&INPIT
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