发明名称 Frequency locked digitally tuned oscillator synthesizer
摘要 A synthesizer is disclosed and is digitally tuned and locked in a measured frequency. The synthesizer uses both the dual voltage control oscillator, each operating over less than an octave, in combination with the microwave doublers to produce a multi-octave RF output with low having low harmonics and free of spurious output signals thereon. The synthesizer uses a sampling downconverter that would, without the benefits of the present invention, produce an ambiguous IF output signal that is translated from the VCO microwave frequency. The ambiguity of the sampling downconverter is corrected by using in-phase and quadrature components of the IF output signal produced by the downconverter along with an Arc Tan to generate a series of digital phase data that is compared against a known reference to eliminate the ambiguity of the VCO frequency. The synthesizer further uses at least one clocking source having an output that is selectively filtered to avoid singularity problems normally plaguing downconverters.
申请公布号 US7209936(B2) 申请公布日期 2007.04.24
申请号 US20030701914 申请日期 2003.11.06
申请人 SULLIVAN WILLIAM B 发明人 SULLIVAN WILLIAM B.
分类号 G06J1/00;G06F1/02;H03B21/02 主分类号 G06J1/00
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