发明名称 Synchronous Time-Division Duplexing Amplifier Architecture
摘要 An apparatus comprising a receiver configured to receive a digital subscriber line (DSL) signal carrying a data burst from a first network element (NE) via a first DSL line in a network, a processor coupled to the receiver and configured to perform frame synchronization to determine a burst timing of the data burst, perform signal amplification on the DSL signal to produce an amplified DSL signal, and determine a transmission time for the amplified DSL signal according to the burst timing of the data burst, and a transmitter coupled to the processor configured to transmit the amplified DSL signal to a second NE over a second DSL line in the network according to the transmission time to facilitate communication between the first NE and the second NE.
申请公布号 US2016254875(A1) 申请公布日期 2016.09.01
申请号 US201615050081 申请日期 2016.02.22
申请人 Futurewei Technologies, Inc. 发明人 Gupta Sanjay
分类号 H04J3/06;H04B3/03;H04L5/14 主分类号 H04J3/06
代理机构 代理人
主权项 1. An apparatus comprising: a receiver configured to receive a digital subscriber line (DSL) signal carrying a data burst from a first network element (NE) via a first DSL line in a network; a processor coupled to the receiver and configured to: perform frame synchronization to determine a burst timing of the data burst;perform signal amplification on the DSL signal to produce an amplified DSL signal; anddetermine a transmission time for the amplified DSL signal according to the burst timing of the data burst; and a transmitter coupled to the processor configured to transmit the amplified DSL signal to a second NE over a second DSL line in the network according to the transmission time to facilitate communication between the first NE and the second NE.
地址 Plano TX US