发明名称 Semiconductor device with a multilevel interconnection connected to a guard ring
摘要 A semiconductor device includes an alignment mark which is arranged adjacent to each corner of a semiconductor chip, and a plug which contacts the alignment mark. The alignment mark is formed by part of the uppermost interconnection layer in a multilevel interconnection which is formed on the semiconductor chip and obtained by stacking low-permittivity insulating layers and interconnection layers. The plug is buried in a contact hole formed in the low-permittivity insulating layer below the alignment mark, and contacts the alignment mark.
申请公布号 US7205636(B2) 申请公布日期 2007.04.17
申请号 US20060437656 申请日期 2006.05.22
申请人 发明人
分类号 H01L23/52;H01L23/544;H01L21/3205;H01L21/46 主分类号 H01L23/52
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