| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a method for designing a mask pattern by which an increased OPC (optical proximity correction) treatment time can be shortened; the manufacturing TAT of a semiconductor device can be shortened, and cost can be reduced. <P>SOLUTION: A cell library pattern which basically constitutes a semiconductor circuit pattern is preliminarily subjected to an OPC treatment and a semiconductor chip is formed by using the OPC treated cell library pattern. Then, a correction treatment (an optimization treatment) is conducted since the pattern is affected by patterns of cells arranged on the periphery thereof and patterns placed on the periphery of other cells. The place of the correction treatment is a section in which the patterns are opposite to each other via a cell boundary within a specified region distanced from the cell boundary. The optical proximity correction is conducted by using a width, a length, and a position of the section as variables, or the optical proximity correction is conducted by using a polygon as a variable, or the optical proximity correction is conducted by sizing. <P>COPYRIGHT: (C)2007,JPO&INPIT |
