发明名称 RECEIVING APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To provide a receiving apparatus which shortens a transmission delay time while inhibiting a pulse-width distortion. <P>SOLUTION: The receiving apparatus has: first threshold-voltage generators 60, 70, 80 and 90 generating a first threshold voltage lower than approximately the half of the peak voltage of a voltage signal S30; and second threshold-voltage generators 50 and 100 generating a second threshold voltage lower than the peak voltage of the voltage signal S30 by a first threshold voltage section. The receiving apparatus further has: comparators 40 and 110 selecting and outputting the first threshold voltage when the voltage signal S30 is changed from a first potential to a second potential higher than the first potential, while generating and outputting a digital signal S100, by comparing first or second threshold voltage S70 output from a selector SW selecting and outputting the second threshold voltage, the voltage signal S30, and a selector SW when the voltage signal S30 is changed from the second potential to the first potential. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007096593(A) 申请公布日期 2007.04.12
申请号 JP20050281499 申请日期 2005.09.28
申请人 TOSHIBA CORP 发明人 FURUYA MIKI;SUZUNAGA HIROSHI;TAKIBA YUKIKO
分类号 H03F3/08;H04B10/07;H04B10/2507;H04B10/40;H04B10/50;H04B10/524;H04B10/564;H04B10/58;H04B10/60;H04B10/69 主分类号 H03F3/08
代理机构 代理人
主权项
地址