发明名称 NICAM PROCESSOR
摘要 <p>A NICAM processor (82) comprises a first memory (100) for temporarily storing a current frame of A-channel and B-channel input data, wherein the current frame data is stored into the first memory at a first clock rate. A second memory (106, 108) temporarily stores companded A-channel and B-channel data of a previous frame in a format other than an interleaved format according to NICAM standard requirements. An interleaving circuit (105) reads the previous frame companded data from the second memory at a second clock rate and in a manner for interleaving the previous frame data into the NICAM standard required interleaved format. A bit stream generator (114) generates a first portion of an output bit stream, multiplexes it with a payload portion, and outputs the output bit stream, wherein the first portion comprises a frame alignment word, control information and additional data, and the payload portion comprises the interleaved data of the previous frame. A companding and storing circuit (104) compands the input data of the current frame and stores the companded data into the second memory at a third clock rate and in the format other than the NICAM interleaved format. The companding and storing circuit is operative during an interval within the current frame, subsequent to the storing into the first memory and the reading from the second memory.</p>
申请公布号 WO2007041140(A2) 申请公布日期 2007.04.12
申请号 WO2006US37626 申请日期 2006.09.25
申请人 FREESCALE SEMICONDUCTOR INC.;ZOSO, LUCIANO;CHIN, ALLAN P.;LESTER, DAVID P. 发明人 ZOSO, LUCIANO;CHIN, ALLAN P.;LESTER, DAVID P.
分类号 H04N11/00 主分类号 H04N11/00
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