摘要 |
<p>A coating architecture (106, 206, 306) minimizing interfacial resistance across an interface (100, 200, 300) of a metal (104, 204, 304) and a semiconductor including at least two layers (108, 110, 112, 208, 210, 212, 306) intermediate the metal (104, 204, 304) and the semiconductor.</p> |
申请人 |
CARRIER CORPORATION;WILLIGAN, RHONDA, R.;JAWOROWSKI, MARK |
发明人 |
WILLIGAN, RHONDA, R.;JAWOROWSKI, MARK |