METHOD FOR DESIGNING MASK PATTERN AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

摘要

PROBLEM TO BE SOLVED: To provide mask designing techniques capable of shortening the increased OPC (Optical Proximity Correction) processing time, shortening the manufacture TAT (Turn Around Time) of a semiconductor device, thereby reducing cost.

SOLUTION: A cell library pattern constituting a basic configuration of a semiconductor circuit pattern is preliminarily subjected to an OPC processing for the layout of a single pattern, and the processed cell library pattern is used to produce a semiconductor chip. A plurality of cell libraries are laid to design a mask pattern and the correction amount by the OPC applied to the cell library is changed by considering the influences of cell library patterns laid in the periphery. Further, a group of cells in the identical layout of the objective cell as well as peripheral cells is extracted and registered as a cell set, so that OPC on identical cell sets is carried out not by repeating computation but by copying.

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