发明名称 Voltage controlled delay line (VCDL) having embedded multiplexer and interpolation functions
摘要 A voltage controlled delay line (VCDL). The VCDL includes one or more cells. Each of the one or more cells includes two or more inputs and an output. Each of the one or more cells is configured to provide a delay as well as an interpolation function and a multiplexer function. The VCDL may be used to provide delay in a delay locked loop (DLL).
申请公布号 US2007075757(A1) 申请公布日期 2007.04.05
申请号 US20050240231 申请日期 2005.09.30
申请人 ADVANCED MICRO DEVICES, INC. 发明人 KUMAR ROHIT;DAGA ANAND;SETHI SANJAY
分类号 H03L7/06 主分类号 H03L7/06
代理机构 代理人
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