| 摘要 |
PROBLEM TO BE SOLVED: To prevent software time-out while attaining burst restart operation after early burst termination (burst transfer interruption) with a simple circuit. SOLUTION: A CPU bas slave part is equipped with a CPU bus I/F part, a data transfer control unit, a burst length holding means, and a burst count means and is further equipped with a burst interruption detection means and a master ID holding means. Also, it is equipped with a burst interruption signal outputted from the burst interruption detection means, an activation signal, and a command signal outputted by the CPU bus I/F part. During the burst interruption signal is asserted, each part of the CPU bus slave part is kept in a state before the burst transfer interruption by suppressing assertion of the activation signal and update of the command signal. Moreover, when there is a read access from the CPU during the burst interruption, retry is informed to the CPU by returning a specific data value. COPYRIGHT: (C)2007,JPO&INPIT
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