发明名称 Test circuit for multi-port memory device
摘要 A semiconductor memory device includes a read bus line for transferring read data; a write bus line for transferring write data; and a temporary data storage unit connected between the read bus line and the write bus line and controlled by a test mode signal enabled during a test mode.
申请公布号 US2007074064(A1) 申请公布日期 2007.03.29
申请号 US20060524023 申请日期 2006.09.19
申请人 HYNIX SEMICONDUCTOR INC. 发明人 HUR HWANG;DO CHANG-HO
分类号 G06F11/00 主分类号 G06F11/00
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